3 STN4536 due n channel enhancement mode mosfet 10.0a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. stn45326 2007. v1 description STN4536 is due n-channel logic enhancement mode pow er field effect transistor which is produced using high cell density, dmos tre nch technology. this high density process is especially tailored to minimize on-state resistance. these devices are particularly suited for low voltage application suc h as power management and other battery powered circuits where high-side switching. pin configuration sop-8 part marking y: year code a: process code b wafer code feature 40v/10.0a, r ds(on) = 25m? @v gs = 10v 40v/8.0a, r ds(on) = 31m? @v gs = 4.5v super high density cell design for extremely low r ds(on) exceptional on-resistance and maximum dc current capability sop-8 package design
3 STN4536 due n channel enhancement mode mosfet 10.0a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. stn45326 2007. v1 absoulte maximum ratings (ta = 25 unless otherwise noted ) parameter symbol typical unit drain-source voltage vdss 40 v gate-source voltage vgss 20 v continuous drain current (tj=150 ) ta=25 ta=70 id 10.0 8.0 a pulsed drain current idm 30 a continuous source current (diode conduction) is 2.3 a power dissipation ta=25 ta=70 pd 2.5 1.6 w operation junction temperature tj 150 storgae temperature range tstg -55/150 thermal resistance-junction to ambient rja 80 /w
3 STN4536 due n channel enhancement mode mosfet 10.0a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. stn45326 2007. v1 electrical characteristics ( ta = 25 unless otherwise noted ) parameter symbol condition min typ max unit static drain-source breakdown voltage v (br)dss v gs =0v,id=250ua 40 v gate threshold voltage v gs(th) v ds =v gs ,id=250ua 1.0 2.5 v gate leakage current i gss v ds =0v,v gs =20v 100 na v ds =40v,v gs =0v 1 zero gate voltage drain current i dss v ds =40v,v gs =0v t j =85 10 ua drain-source on- resistance r ds(on) v gs =10v,i d =10a v gs =4.5v,i d =8a 20 35 25 31 m? forward transconductance gfs v ds =15v,i d =6.2av 13 s diode forward voltage v sd i s =2.3a,v gs =0v 0.8 1.0 v dynamic total gate charge q g 10 14 gate-source charge q gs 2.8 gate-drain charge q gd v ds =20v,v gs =4.5 i d 5a 3.2 nc input capacitance c iss 850 output capacitance c oss 110 reverse transfercapacitance c rss v ds =20v,vgs=0v f=1mhz 75 pf 6 12 turn-on time t d(on) tr 10 20 20 36 turn-off time t d(off) tf v dd =20v,r l = 4? i d =5.0a,v gen =10v r g =1? 6 12 ns
3 STN4536 due n channel enhancement mode mosfet 10.0a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. stn45326 2007. v1 typical characterictics
3 STN4536 due n channel enhancement mode mosfet 10.0a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. stn45326 2007. v1 typical characterictics
3 STN4536 due n channel enhancement mode mosfet 10.0a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. stn45326 2007. v1 package outline sop-8p
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